Thin film transistor and method for fabricating same

ABSTRACT

In a thin film transistor provided with a metallic layer with a light-shading property and a Si layer formed on an insulating layer, a dent for locally thinning the insulating layer is formed on a portion corresponding to a drain region. When the Si layer is recrystallized by means of a laser light irradiation, the dent serves as a crystalline nucleus formation region in order to recrystallize a particular portion earlier than other portions. Recrystallization of melted Si starts from a periphery of a bottom surface of the dent, hence a Si layer formed of a single crystal or uniformed crystal grains which serves as an active region of the TFT can be obtained.

FIELD OF THE INVENTION

[0001] This invention relates to a thin film transistor used in anelectronic instrument, such as a display, a sensor or a printing device,or a semiconductor device, such as a memory or a CPU, and a method forfabricating the same.

BACKGROUND OF THE INVENTION

[0002] Hitherto, a technology for fabricating a thin film transistor (aTFT, hereinafter) formed of hydrogenated amorphous Si (a-Si:H) orpolycrystalline Si has been developed and put to practical use as arepresentative technology for fabricating the TFT on an insulatingsubstrate such as a glass substrate.

[0003] In the technology for fabricating the hydrogenated amorphous Si(a-Si:H)TFT, the maximum temperature in the fabrication process is about300° C., and the carrier mobility of about 1 cm²/Vsec is realized.

[0004] Accordingly, the TFT fabricated by using the aforementionedtechnology is used as a switching transistor for each pixel in an activematrix liquid crystal display (an AM-LCD, hereinafter), and in thiscase, the pixel-TFT is driven by a driver circuit (an IC or a LSIfabricated on a Si substrate formed of a single crystal).

[0005] Moreover, since each pixel is provided with the switching TFT inthe AM-LCD, a cross talk is reduced. And an image with an excellentquality can be obtained as compared with a passive matrix LCD.

[0006] On the other hand, in the technology of the TFT formed ofpolycrystalline Si, the high carrier mobility of 30 to 100 cm²/Vsec canbe realized by using the high temperature fabrication process which issimilar to that of a LSI based on a SiO₂ substrate and conducted in themaximum temperature of about 1000° C.

[0007] Accordingly, if the aforementioned technology is applied to theLCD, the pixel-TFTs and the peripheral driving circuits for thepixel-TFTs can be formed on the same glass substrate.

[0008] Moreover, according to the conventional technology, due to recenttendency that the LCD is compact and the resolution of the picturethereof is improved, it becomes extremely difficult to join the ICsserving as the peripheral drivers with the AM-LCD substrate by means ofTAB connection or wire bounding because of a narrow pitch of joining.However, this difficulty can be overcome by means of the TFTs formed ofpolycrystalline Si, fabrication cost can be cut down, and products canbe small sized.

[0009] However, according to the technology of the TFT formed ofpolycrystalline Si, since the fabrication process is carried out in ahigh temperature, glass with low softening temperature and with a lowcost which has been used in a fabrication process of the TFT formed ofhydrogenated amorphous Si cannot be used.

[0010] Accordingly, in order to reduce the maximum temperature in thefabrication process of the TFT formed of polycrystalline Si, a methodfor forming a polycrystalline Si layer in a low temperature region bymeans of laser crystallization technology is being studied anddeveloped.

[0011] In general, a laser pulse irradiation apparatus realizes acrystallization technology by means of laser irradiation with astructure shown in FIG.1.

[0012] A laser light which functions as an energy beam and is emittedfrom a pulse laser light source passes through an optical path regulatedby optics, such as mirrors and a beam homogenizer for spatiallyhomogenizing a light intensity, and reaches a Si layer formed on a glasssubstrate 5.

[0013] Since a region irradiated by the laser light is far smaller thanthe glass substrate in most cases, the laser light irradiates a desiredposition by displacing the glass substrate by means of a x-y stage. Amethod that the aforementioned optics are displaced without using thex-y stage or both the optics and the stage are displaced is adoptedalso.

[0014] The polycrystalline Si layer formed by laser irradiation is usedfor a TFT as shown in FIG.2.

[0015] In the TFT shown in FIG. 2, a channel region 7, a source region8, a drain region 9 and a lightly doped drain (a LDD, hereinafter region14 are formed on a glass substrate 5 covered with a substrate-coatinglayer 19, and a gate insulating layer 12 and a gate electrode 10 areformed thereon. Moreover, a SiO₂ layer 4 is deposited, and a metalliclayer 11 is formed in a contact hole.

[0016] The LDD regions 14 which are provided for the TFT and serve asoffset gate regions suppress an off-leak current caused by trap levelswhich are generated around grain boundaries with high density in thepolycrystalline Si semiconductor.

[0017] However, according to the aforementioned method for forming apolycrystalline Si layer by means of laser irradiation, grain sizeswidely vary in a range extending from several nm to several μm inaccordance with an intensity of a laser light, a width of a pulse andthe number of the pulses, and it is difficult to uniformly grow crystalgrains with a desired grain size at a desired position. Especially, incrystallization by means of an excimer laser, since nucleation occurs inan extremely short time in the order of nano second in the processes ofa laser light absorption and recrystallization of the Si layer, it isvery difficult to uniformly grow the crystal grains at a desiredposition.

[0018] The engineer of the semiconductor device faces the aforementioneddifficulties in case that he tries to grow a polycrystalline Si layer ina solid phase or to directly deposit the same on a glass substrate aswell as in case that he tries to form the same by means of lasercrystallization technology.

[0019] As mentioned in the above, since the states of the grainboundaries are not uniform in the conventional TFTs, the off-leakcurrents fluctuate, and this difficulty is not overcome even if the LDDregions are formed at both the side ends of the channel region, hencethe off-leak current cannot be precisely reduced as a result.

[0020] A semiconductor IC comprising the TFT which reduces the off-leakcurrent by means of low density off set gate regions (LDD regions)formed in the channel region is disclosed in Japanese Patent 2525707 asa technology for overcoming the aforementioned difficulty.

[0021] However, since the state of the grain boundaries of the TFT isnot uniform as mentioned in the above, the off-leak current cannot beprecisely reduced. Especially, in the step of crystallizing the Si layerby means of the excimer laser irradiation, generation of the crystallinenucleuses cannot be controlled, and the aforementioned difficulty cannotbe completely overcome.

[0022] Moreover, in a semiconductor device for overcoming theaforementioned difficulty disclosed in Japanese Patent ApplicationLaid-open No. 9-293870, an electrical conductive layer with a high heatconductance is inserted between a glass substrate and an alkali metallicion-obstructing layer.

[0023] In the aforementioned technology, melted Si is almost uniformlycooled and solidified, and a polycrystalline Si layer composed ofcrystal grains with a particular orientation can be obtained. Although aTFT with the high carrier mobility can be obtained by the aforementionedtechnology, an off-leak current cannot be precisely reduced, andlocation of nucleation cannot be precisely controlled, hence theaforementioned problem cannot be completely solved.

[0024] In the aforementioned TFT disclosed in Japanese PatentApplication Laid-open No. 9-293870, the structure of a lamination of theTFT is described as an electrical conductive layer with a high heatconductance/a gate electrode/an insulating layer/a Si layer, which isradically different from a structure of an embodiment of the presentinvention (an electrical conductive layer with a high heatconductance/an insulating layer/a Si layer/an insulating layer/a gateelectrode). Accordingly, it can be concluded that the TFT according tothe present invention is different from that according to JapanesePatent Application Laid-open No. 9-293870 in their objects and effects.

SUMMARY OF THE INVENTION

[0025] Accordingly, it is an object of the invention to provide a thinfilm transistor and a method for fabricating the same, in which anoff-leak current caused by trap levels formed around grain boundaries isradically reduced by eliminating the grain boundaries in accordance witha single crystallization of Si layers.

[0026] It is a further object of the invention to provide a thin filmtransistor and a method for fabricating the same, in which an off-leakcurrent and the fluctuation thereof are precisely reduced by formingsize-controlled crystal grains at desired locations.

[0027] According to the first feature of the invention, a thin filmtransistor comprises:

[0028] a cooling layer formed on a substrate,

[0029] an insulating layer formed on the cooling layer, a heatconductivity of the cooling layer being higher than that of theinsulating layer, and

[0030] a semiconductor layer which is formed on the insulating layer andcomprises a drain region, a channel region and a source region,

[0031] wherein the cooling layer is locally close to at least one of thedrain region, the channel region and the source region.

[0032] According to the aforementioned structure, in case that the Silayer formed on the insulating layer is irradiated with an excimer laserbeam to form a crystalline Si layer, crystalline nucleuses are formed ona portion of an active region (the drain, channel and source regions)which is locally close to the cooling layer, and crystallization startsfrom the crystalline nucleuses towards regions where melted Si layer iscooled a certain time later.

[0033] Accordingly, a Si layer formed of a single crystal orsize-controlled crystal grains can be made up by epitaxially growing aSi layer around the crystalline nucleuses, and the TFT which radicallyreduces an off-leak current caused by trap levels generated around grainboundaries can be fabricated by means of the aforementioned Si layer,hence the off-leak current of the TFT can be precisely reduced.

[0034] In the structures according to claims 2 and 3, either of at leastone of the drain, channel and source regions or the cooling layerclosely approaches the remainder.

[0035] As mentioned in the above, since the engineer of thesemiconductor device is given a wide range of choice in designing thestructure of the cooling layer and an active region (the drain, channeland source regions) of a semiconductor device, degree of freedom in thedesign is increased, and the optimum design can be performed.

[0036] In the structure according to claim 4, a gate electrode is formedon the channel region, and the drain region closely approaches thecooling layer.

[0037] Accordingly, since a single crystal region or an size-controlledcrystal grain region can be formed in the neighborhood of the drainregion, that is to say, in the channel region, the off-leak current canbe effectively reduced.

[0038] Explaining concretely, the off-leak current in the drain regionpeculiar to polycrystalline Si can be reduced by designing the TFT sothat a Si layer formed of a single crystal is made up in theneighborhood of the drain region.

[0039] In the structure according to claim 5, the cooling layer of theTFT has a shadowing property.

[0040] According to the aforementioned structure, photo-carriers can beprevented from being generated in condition an external lightilluminates the TFT, and thereby a wrong operation can be avoided. Theaforementioned characteristic is appreciated in a LCD used in a liquidcrystal projector, which is exposed to a strong light, and especially inthe TFT for driving a pixel in a liquid crystal.

[0041] According to the second feature of the invention, a method forfabricating a TFT comprises the steps of

[0042] forming a cooling layer with a high heat conductivity on asubstrate,

[0043] forming an insulating layer with a lower heat conductivity thanthat of the cooling layer on the cooling layer,

[0044] locally thinning the insulating layer,

[0045] forming a semiconductor layer on the locally thinned insulatinglayer, and

[0046] irradiating the locally thinned insulating layer with an energybeam.

[0047] A method for fabricating a TFT according to claim 7 comprises thesteps of:

[0048] forming a semiconductor layer on a substrate,

[0049] forming a cooling layer with a higher heat conductivity than thatof the semiconductor layer on the semiconductor layer,

[0050] patterning the cooling layer,

[0051] irradiating the semiconductor layer and the cooling layer with anenergy beam, and

[0052] removing at least a portion of the cooling layer.

[0053] As mentioned in the above, a Si layer formed of a single crystalregion or a size-controlled crystal grain region can be made up byforming a cooling layer on the Si layer and by patterning the same, andthereby the off-leak current can be reduced radically and precisely.

BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The invention will be explained in more detail in conjunctionwith the appended drawings, wherein:

[0055]FIG. 1 shows an outline of a laser pulse irradiation apparatus,

[0056]FIG. 2 is a cross-sectional view for showing a structure of aconventional TFT,

[0057]FIGS. 3A to 3C show an outline of a TFT according to the firstpreferred embodiment of the invention, wherein FIG. 3A is a top view forshowing a structure of a TFT at an early stage of a fabrication process.FIG. 3B is a cross-sectional view of a structure shown in FIG. 3A takenalong a line A-A, and FIG. 3C is a cross-sectional view for showing astructure of a TFT in the final stage of a fabrication process,

[0058]FIGS. 4A and 4B show an outline of a TFT according to the firstexample of application, wherein FIG. 4A is a cross-sectional view forshowing a structure of a TFT in an early stage of a fabrication process,and FIG. 4B is a cross-sectional view for showing a structure of a TFTin the final stage of a fabrication process,

[0059]FIGS. 5A and 5B show an outline of a TFT according to the secondexample of application, wherein FIG. 5A is a cross-sectional view forshowing a TFT in an early-stage of a fabrication process, and FIG. 5B isa cross-sectional view for showing an outline of a structure of a TFT inthe final stage of a fabrication process,

[0060]FIGS. 6A and 6B shows an outline of a structure of a TFT accordingto the third example of application, wherein FIG. 6A is across-sectional view for showing a TFT in an early stage of afabrication process, and FIG. 6B is a cross-sectional view for showing astructure of a TFT at the final stage of a fabrication process,

[0061]FIGS. 7A and 7B shows an outline of a structure of a complementaryMOS (a CMOS) using a TFT according to the fourth example of application,wherein FIG. 7A is a cross-sectional view for showing an outline of astructure of TFT in an early stage of a fabrication process, and FIG. 7Bshows a structure of a TFT in the final process of a fabricationprocess,

[0062]FIG. 8 is a cross-sectional view for showing a CMOS in the middleof a fabrication process,

[0063]FIG. 9 shows an outline of a semiconductor memory device usingTFTs according to the invention,

[0064]FIG. 10 shows an outline of a LCD using TFTs according to theinvention,

[0065]FIG. 11 shows an outline of a projector using TFTs according tothe invention, and

[0066]FIGS. 12A and 12B show an outline of a portable scanner using TFTsaccording to the invention, wherein FIG. 12A shows a perspective viewfor showing an internal structure of the same, and FIG. 12B is anenlarged cross-sectional view for showing the same.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0067] Thereafter, preferred embodiments of TFTs and methods forfabricating the same will be explained referring to the appendeddrawings.

[0068] First, a TFT according to the first preferred embodiment of theinvention will be explained.

The First Preferred Embodiment

[0069]FIG. 3A to 3C respectively show an outline of a method forfabricating the TFT according to the first preferred embodiment of theinvention. Wherein FIG. 3A is a top view of a processed substrate in anearly stage of a fabrication process. FIG. 3B is a cross-sectional viewof the processed substrate shown in FIG. 3A taken along a line A-A. AndFIG. 3C is a cross-sectional view for showing an outline of theprocessed substrate in the final stage of the fabrication process.

[0070] As shown in FIG. 3A, a Si layer 1 to 3 is formed on a top surfaceof the processed substrate in the early stage in the fabricationprocess, and explaining concretely, a tungsten silicide layer 6 servingas a cooling layer, a SiO₂ layer 4 serving as an insulating layer andthe Si layer 1 to 3 are successively formed on a glass substrate 5.

[0071] A heat conductance of the tungsten silicide layer 6 is higherthan that of the SiO₂ layer 4, and the tungsten silicide layer 6 coversalmost a whole top surface of the glass substrate 5.

[0072] Accordingly, when the Si layer 1 to 3 is irradiated with a laserlight to be crystallized, the tungsten silicide layer 6 conducts heatgenerated in the Si layer 1 to 3 with high efficiency, and cools thesame.

[0073] Although the tungsten silicide layer 6 is exemplified as acooling layer in FIG. 3B, a heat conductor of the other kind may beadopted for the same purpose.

[0074] A top surface of the tungsten silicide layer 6 is covered withthe SiO₂ layer 4, on which a dent with a square shaped bottom surface isformed.

[0075] Since the bottom surface of the dent is closer to the tungstensilicide layer 6 serving as the cooling layer than the top surface ofthe SiO₂ layer 4 other than the dent, heat generated on the bottomsurface of the dent is conducted to the tungsten silicide layer 6 themost effectively. Accordingly, the Si layer 2 formed on the bottomsurface of the dent is cooled the earliest.

[0076] The Si layer 1 to 3 covers almost all the top surface of the SiO₂layer 4 and the bottom and side surfaces of the dent.

[0077] If an excimer laser light is irradiated on a surface of theprocessed substrate on condition that the Si layer 1 to 3 is melted, theSi layer 1 to 3 is successively solidified after laser irradiation isover in the reverse order of a distance from the tungsten silicide layer6 with the high heat conductance.

[0078] That is to say, since the Si layer 2 formed on the bottom surfaceof the dent is the closest to the tungsten silicide layer 6, heatgenerated therein is conducted to the cooling layer the most effectivelyafter laser irradiation is over, and the Si layer 2 is cooled andsolidified earlier than the Si layer 1, 3.

[0079] Explaining more concretely, since the Si layer 2 formed on thebottom surface of the dent is cooled earlier than the circumferencethereof, the Si layer 2 is solidified with an incubation time t₁ and acrystalline nucleus density n₁, and the first polycrystalline Si regionis formed.

[0080] Moreover, a Si crystal layer is grown in the Si layer 3 towardsthe side surfaces and circumference of the dent, because the Si layer 2which begins to be solidified in the first polycrystalline Si regionfunctions as nucleuses in the aforementioned crystallization.

[0081] At this time, a distance of crystal growth is determined by apoint where the Si layer 3 collides with the second polycrystalline Siregion (the Si layer 1), which is solidified with an incubation time t₂(t₁<t₂) and a nucleus density n₂ (n₁>n₂), wherein a time of crystalgrowth t₃ is given by t₂−t₁.

[0082] Accordingly, the Si layer 3 is grown on the basis of the firstpolycrystalline Si region (the Si layer 2) serving as nucleuses, andformed as a single crystal till it collides with the secondpolycrystalline Si region (the Si layer 1).

[0083] As mentioned in the above, according to the aforementionedstructure, a situation that the Si layer 1 to 3 is uniformly cooled,crystalline nucleuses are randomly generated after a particularincubation time has passed, crystal grains are randomly formed aroundthe crystalline nucleuses, and grain boundaries are randomly formed inthe recrystallization process by means of the excimer laser can beavoided.

[0084] That is to say, according to the TFT according to the invention,since solidification (recrystallization) starts from a particularposition (the bottom surface of the dent) and proceeds to portions wheresolidification starts a certain time later in the recrystallizationprocess, a single crystal can be grown from the bottom surface of thedent serving as nucleuses towards the outside circumference.

[0085]FIG. 3C shows a structure of the TFT comprising the Si layer 1 to3 formed in this way.

[0086] A channel region 7, a source region 8 and a drain region 9 aresuccessively formed in the processed substrate. Subsequently, a gate 10separated from the active region by a gate insulating layer 12, ametallic layer 11 and an interlayer insulating layer 13 are provide forthe processed substrate.

[0087] The channel region 7 can be formed of a single crystal layer bypositioning the drain region 9 on the Si layer 2.

[0088] At this time, since the crystals start to grow from four sidesaround the bottom surface, there is a possibility that grain boundariesare formed along diagonals. However, the grain boundaries are preventedfrom being formed on the active region by shaping the drain region, thechannel region and the source region into long and narrow rectangularconfigurations.

[0089] As a result, since the number of the grain boundaries is reduced,an off-leak current caused by grain boundary traps which is peculiar tothe transistor formed of the polycrystalline Si can be radicallyreduced.

[0090] As mentioned in the above, the channel region 7 formed of asingle crystal with no grain boundary can be formed by adjusting theincubation times t₁, t₂ and lengthening the crystal growth time t₃represented as t₁−t₂.

[0091] As mentioned in the above, according to the TFT according to thefirst preferred embodiment of the invention, since a portion of thedrain, channel and source regions locally approaches the cooling layerformed of highly heat conductive material, a single crystal is grownfrom the coolest portion which serves as crystalline nucleuses.Accordingly, in the TFT fabricated in this way, the off-leak currentcaused by the grain boundary traps can be radically reduced.

[0092] Moreover, according to the TFT according to the first preferredembodiment of the invention, in the thermal recrystallization process bymeans of the excimer laser, since the crystalline nucleuses are formedin an extremely short time in the order of nano second on the bottomsurface of the dent and a Si layer formed of a single crystal orsize-controlled crystal grains is grown around the aforementionedcrystalline nucleuses, the off-leak current of the TFT can be preciselyreduced.

[0093] In the above description, the explanations are given on a methodfor fabricating a TFT, in which the Si layer formed of a single crystalor size-controlled crystal grains is formed by providing the coolinglayer and thereby the off-leak current caused by trap levels formedaround the grain boundary can be radically reduced, hence the off-leakcurrent of the TFT can be precisely reduced.

[0094] The structure of the TFT according to the first preferredembodiment of the invention, in which a portion of the drain region, thechannel region or the source region closely approaches the cooling layerformed of highly heat conductive material, is never restricted to thestructures shown in FIGS. 3A to 3C, and other various structures can bedevised.

[0095] Next, the other structures will be explained referring to theappended drawings as examples of applications of the first preferredembodiment.

The first Example of Application

[0096]FIGS. 4A to 4B show an outline of a structure of a TFT accordingto the first example of application, wherein FIG. 4A is across-sectional view for showing a structure of the processed substratein an early stage of a fabrication process, and FIG. 4B is across-sectional view for showing a structure of the TFT in the finalstage of the fabrication process.

[0097] As shown in FIG. 4A, in the early stage of the fabricationprocess, the processed substrate is fabricated by successively forming atungsten silicide layer 6 serving as a cooling layer, a SiO₂ layer 4serving as an insulating layer and a Si layer 1 to 3 on a glasssubstrate 5.

[0098] A step is formed on a top surface of the SiO₂ layer 4, and the Silayer 2 is formed on a lower surface of the step.

[0099] Since SiO₂ layer 2 is the closest to the tungsten silicide layer6, this portion is cooled the most effectively.

[0100] If an excimer laser is irradiated on the processed substratehaving a structure shown in FIG. 4A on condition that the Si layer 1 to3 is melted, the Si layer 1 to 3 is recrystallized after the laserirradiation is over. In this case, the Si layer 2 which is the closestto the tungsten silicide layer 6 is solidified firstly, and thereafterthe Si layer 3 formed of a single crystal layer or size-controlledcrystal grains is grown similarly to the first preferred embodiment.

[0101] Subsequently, a channel region 7, a source region 8 and a drainregion 9 are formed of a Si layer 3 of a single crystal. Moreover, agate 10 insulated by the SiO₂ layer and a metallic layer 11 aresuccessively provided for the processed substrate.

[0102] According to the aforementioned process, since a single crystalis or size-controlled crystal grains are formed in the drain region andthe neighborhood thereof (the channel region 7) in the TFT, the off-leakcurrent in the drain region 9 which is peculiar to polycrystalline Sican be effectively reduced.

[0103] In this case, it is desirable that LDD regions 14 are formed atboth the side ends of the channel region 7. According to theaforementioned structure, in case that two or three grain boundaries areuniformly formed, the trouble caused by the aforementioned defect can becompensated, and the off-leak current can be precisely reduced.

[0104] The other structure and the function are similar to those of theTFT according to the first preferred invention.

[0105] As mentioned in the above, in the TFT according to the firstexample of application, since the drain region 9, the channel region 7and the source region 8 are formed of the single crystal layer, theoff-leak current caused by grain boundary traps which is peculiar topolycrystalline Si can be precisely reduced.

The Second Example of Application

[0106]FIGS. 5A and 5B are cross-sectional views for showing an outlineof a structure of a TFT according to the second example of application,wherein FIG. 5A shows a processed substrate in an early stage of afabrication process, and FIG. 5B shows the TFT in the final stage of thefabrication process.

[0107] As shown in FIG. 5A, a tungsten silicide layer 6 serving as acooling layer, a SiO₂ layer 4 serving as an insulating layer and a Silayer 1 to 3 are successively formed on a glass substrate 5.

[0108] A top surface of the SiO₂ layer 4 is provided with a ridge formedby two steps running in parallel with each other, and the Si layer 1 to3 is formed thereon.

[0109] Since the lower surfaces of the steps are the closest to thetungsten silicide layer 6, they are cooled the most effectively.

[0110] If the processed substrate shown in FIG. 5A is irradiated with apulse of an excimer laser on condition that the Si layer 1 to 3 ismelted, the Si layer 2 which is the closest to the tungsten silicidelayer 6 is recrystallized after the laser irradiation is over, andthereafter the Si layer 3 formed of a single crystal or size-controlledcrystal grains is grown similarly to the first preferred embodiment.

[0111] In this case, it is desirable to make a width of the ridge besmall. If the Si layers 3 which are grown from both the side walls ofthe ridge collide with each other at the middle of the top surface ofthe ridge before a Si layer 1 formed of a polycrystalline region isgrown, a channel region 7 comprising a polycrystalline region with anarrow width can be obtained.

[0112] Subsequently, a channel region 7, a source region 8 and a drainregion 7 are formed on the processed substrate. Then, a gate 10insulated by the SiO₂ layer 4 and a metallic layer 11 are successivelyprovided for the processed substrate to fabricate TFT.

[0113] In the TFT according to the invention, since the source region 8and the drain region 9 are formed in a single crystal region 3 and thechannel region 7 is formed in a region formed of size-controlled crystalgrains including a single crystal regions 3, an off-leak current causedby grain boundary traps peculiar to polycrystalline Si is suppressed,and contrast of a picture can be improved when the TFT is applied to apixel-driving device of a LCD. The other structure and the function aresimilar to those of the TFT according to the first example ofapplication.

The Third Example of Application

[0114]FIGS. 6A and 6B show an outline of a structure of a TFT accordingto the third example of application, wherein FIG. 6A shows a structureof a processed substrate in an early stage of a fabrication process, andFIG. 6B shows a structure of a TFT in the final stage of a fabricationprocess.

[0115] As shown in FIG. 6A, the processed substrate is formed bysuccessively forming a tungsten silicide layer 6 serving as a coolinglayer, a SiO₂ layer 4 serving as an insulating layer, and a Si layer 1to 3 on a glass substrate 5.

[0116] A single trench is formed on a top surface of the SiO₂ layer 4and the Si layer 1 to 3 is formed on the SiO₂ layer 4 including thetrench. Since the bottom surface of the trench is the closest to thetungsten silicide layer 6, it is cooled the most effectively.

[0117] If the processed substrate is irradiated with a pulse of anexcimer laser on condition that the Si layer 1 to 3 is melted, the Silayer 2 which is the closest to the tungsten silicide layer 6 issolidified firstly in case that the Si layer 1 to 3 is recrystallizedafter the laser light irradiation is over, and the Si layer 3 formed ofsingle crystals or size-controlled crystal grains can be grown on boththe sides of the Si layer.

[0118] In this case, it is desirable to make a width of the trench besmall. According to the aforementioned structure, since a region of theSi layer 1 formed of polycrystalline Si can be narrowed and the Si layer3 formed of a single crystal or size-controlled crystal grains can bewidened, the channel region 7 with a narrow polycrystalline region canbe obtained.

[0119] Subsequently, a portion of a channel region 7, a source region 8and a drain region 9 are formed of the single crystal Si layer 3 in theprocessed substrate, and the SiO₂ layer 4 serving as a gate insulatinglayer, a gate 10 and a metallic layer 11 are provided for the processedsubstrate to fabricate a TFT.

[0120] The other structure and the function are similar to those of theTFT according to the first example of application.

The Fourth Example of Application

[0121]FIGS. 7A and 7B show an outline of a structure of a complementaryMOS (CMOS) using TFTs, wherein FIG. 7A is a cross-sectional view forshowing a processed substrate in an early stage of a fabricationprocess, and FIG. 7B is a cross-sectional view for showing a structureof the CMOS in the final stage of the fabrication process.

[0122] As shown in FIG. 7A, a glass substrate 5 is provided with aridge. A tungsten silicide layer 6 with a uniform thickness, a SiO₂layer 4 with a flat top surface and a Si layer 1 to 3 are successivelyformed on the glass-substrate 5.

[0123] In the processed substrate shown in FIG. 7A, the Si layer 2 isthe closest to the tungsten silicide layer 6, hence it is cooled themost effectively.

[0124] The ridge is formed in such a way that differences in level arepreviously formed on the glass substrate and the tungsten silicide layer6 is deposited thereon.

[0125] The method for forming the ridge is not restricted to thesubstrate-processing. The ridge can be obtained by depositing anoxidized layer or a nitride layer on a substrate and subsequentlypattering the deposited layer, or by forming a convex portion ontungsten silicide.

[0126] If the processed substrate with the aforementioned structure isirradiated with a pulse of an excimer laser on condition that the Silayer 1 to 3 is melted, the Si layer 2 which is the closest to thetungsten silicide layer 6 is solidified firstly in case that the Silayer 1 to 3 is recrystallized after laser irradiation is over, and theSi layers 3 formed of single crystal or size-controlled crystal grainscan be grown on both the sides of the Si layer.

[0127] In the CMOS circuit comprising the Si layer 1 to 3 formed in thisway, source regions and drain regions are formed by ion implantation asshown in FIG. 8, after a gate insulating layer 12 and gate electrodes 10are formed.

[0128] A n+ region 15 and A p+ region 16 are separately formed byindividually implanting P and B ions by means of a resist, and the CMOScircuit is formed.

[0129] As shown in FIG. 7B, after an interlayer insulating layer 13 andcontact holes are formed, a wiring is conducted by a metallic layer 11.

[0130] Although a region where the n+ region 15 makes into contact withthe p+ region 16 is formed of a polycrystalline region, it is desirablethat this region is formed of a single crystal.

[0131] As mentioned in the above, in the CMOS circuit using the TFTsaccording to the first preferred embodiment, since the channel regions 7can be formed of single crystal regions, the off-leak currents can bereduced, and as a result, consumed currents can be reduced.

[0132] As explained in the above on the basis of several examples ofapplication, according to the TFT according to the invention, since theengineer in the field of the semiconductor device is supplied with awide range of choice in designing the structures of the cooling layerand the active region (the drain, channel and source regions), he canselect the most suitable way for designing the TFT in accordance withhis object, and, as a result, provide the TFT with a high performance.

[0133] Moreover, as a modification of the aforementioned method forfabricating the TFT, another method that a cooling layer is formed andpatterned on a semiconductor layer, the semiconductor layer and thecooling layer are irradiated with an energy beam and crystallinenucleuses are firstly formed in the semiconductor layer lying under thecooling layer can be devised.

[0134] According to the aforementioned method, a similar effect (a Silayer 3 formed of a single crystal or size-controlled crystal grains)can be obtained also, and an off-leak current can be radically andprecisely reduced.

[0135] The TFT according to the invention is widely used for variouselectronic instruments.

[0136] For examples, a semiconductor memory device shown in FIG. 9 canbe constructed by means of the TFTs according to the invention.

[0137] The semiconductor memory device is composed of 2n×2m bits memorycells, and TFTs is used as the memory cells.

[0138] Furthermore, the TFT according to the invention can be used in aLCD as shown in FIG. 10, and FIG. 11 shows an outline of a projectorusing the LCD shown in FIG. 10.

[0139] In FIG. 10, a pixel of a LCD connected with the active matrixarray is driven by peripheral driving circuits (a data driver and a gatedriver). In this case, the TFTs are used in the data driver, the gatedriver and the pixel-TFT.

[0140] As shown in FIG. 11, in the projector, each of lights generatedby a halogen lamp is supplied to the LCD via a dichroic mirror, and animage thereof is projected on a screen via a projector lens. In thiscase, the LCDs respectively corresponding to the red, green and bluecomponents are used.

[0141] Stillmore, the TFT according to the invention can be applied to aportable scanner shown in FIGS. 12A and 12B, and explaining concretelythe TFTs are used for driving amorphous Si photodiodes.

[0142] The image sensor is composed of the amorphous Si photodiodes, ashift register which is composed of the TFTs and controls a scan in themain scanning direction, and read switches.

[0143] The portable scanner is provided with a light source, an imagesensor and a fiber array plate. A picture on a manuscript is illuminatedby the light source situated behind the image sensor, and read by meansof the fiber array plate.

[0144] A picture signal read by the image sensor is scanned in thesub-scanning direction by means of a roller and an encoder, andoutputted to a computer or a recording apparatus.

[0145] Although an explanation is given on the portable scanner, the TFTaccording to the invention can be applied to a flat bed type scanner, afacsimile, a digital duplicator or a two dimensional sensor.

[0146] As mentioned in the above, in the TFT according to the invention,when a Si layer formed on an insulator is irradiated with a pulse of anexcimer laser light on condition that the Si layer is melted,crystalline nucleuses are formed in a portion corresponding to an activeregion (a drain region, a channel region and a source region which islocally close to a cooling layer, and rescrystallization starts from thecrystalline nucleuses towards regions in which the melted Si layer iscooled a certain time later.

[0147] Accordingly, a Si layer formed of a single crystal orsize-controlled crystal grains can be obtained in the neighborhood ofthe crystalline nucleuses, and the TFT provided with the aforementionedSi layer can radically reduce an off-leak current caused by trap levelsgenerated in a polycrystalline region.

[0148] Although the invention has been described with respect tospecific embodiment for complete and clear disclosure, the appendedclaims are not to be thus limited but are to be construed as embodyingall modification and alternative constructions that may be occurred toone skilled in the art which fairly fall within the basic teaching hereis set forth.

What is claimed is:
 1. A thin film transistor, comprising: a coolinglayer formed on a substrate, an insulating layer formed on said coolinglayer, a heat conductivity of said cooling layer being higher than thatof said insulating layer, and a semiconductor layer which is formed onsaid insulating layer and comprises a drain region, a channel region anda source region, wherein said cooling layer is locally close to at leastone of said drain region, said channel region and said source region. 2.A thin film transistor according to claim 1, wherein: at least one ofsaid drain region, said channel region and said source region is shapedto be close to said cooling layer
 3. A thin film transistor according toclaim 1, wherein: said cooling layer is shaped to be close to said atleast one of said drain region, said channel region and said sourceregion.
 4. A thin film transistor according to claim 1, wherein: a gateelectrode is formed on said channel region, and said drain regionclosely approaches said cooling layer.
 5. A thin film transistoraccording to claim 1, wherein: said cooling layer has a light-shadingproperty.
 6. A method for fabricating a thin film transistor, comprisingthe steps of: forming a cooling layer with a high heat conductivity on asubstrate, forming an insulating layer with a lower heat conductivitythan that of said cooling layer on said cooling layer, locally thinningsaid insulating layer, forming a semiconductor layer on said locallythinned insulating layer, and irradiating said locally thinnedinsulating layer with an energy beam.
 7. A method for fabricating a thinfilm transistor, comprising the steps of: forming a semiconductor layeron a substrate, forming a cooling layer with a higher heat conductivitythan that of said semiconductor layer on said semiconductor layer,patterning said cooling layer, irradiating said semiconductor layer andsaid cooling layer with an energy beam, and removing at least a portionof said cooling layer.
 8. A thin film transistor fabricated on aninsulating layer formed on a substrate, comprising: an insulated gateelectrode; and an active layer including a source region, a drain regionand a channel region which are composed of a semiconductor layer formedon said insulating layer; wherein a part of said active layer is of asingle crystal layer.
 9. The thin film transistor as defined in claim 8,wherein: a rest of said active layer is of a polycrystalline layer. 10.The thin film transistor as defined in claim 8, wherein: said part ofsaid active layer is said channel region.
 11. The thin film transistoras defined in claim 8, wherein: said rest of said active layer comprisessaid source region and said drain region.